Update : March 25th, 2013  

Stéphane BURIGNAT

Training, Teaching and Research Activities



2009-- :
Post-doctorat
(Research Grant)

Electronics and Information Systems department - Gent University (Belgium)

Administrative responsibilities     
- Writing of projects ("FWO - Krediet aan navorser") and participation to the writing of a collaborative FP7 project,
- Organisation of the conférence RC2011 (3rd International Workshop on Reversible Computation of july 2011),
- Thesis manager of two ERASMUS students.


Scientific manager for the design of reversible circuit in the framework of the "Micropower" project     
- Prototype realization of reversible circuits in 350 nm CMOS technology
     Synthesis, design and test of reversible digital (quantum) circuits to be used in adiabatic computation: "Cuccaro" Adder, H264/AVC encoder,
- Synthesis, design and test of new reversibleelementary gates and building of a standard library for reversible ASICs design, (in progress)
- Installation des outils de conception CADENCE pour les futurs circuits prévus en 130 nm (in progress).


Research on interfacing reversible circuits with other technologies     
- Design of electronic boards for interfacing reversible circuit with a conventional CMOS ASIC circuit (XILINX Spartan-3E),
- Search for new partnerships in the domain of biomedical and optical applications (sensors, antena etc.).



Lien vers UGent Lien vers ELIS


Research page on
"Reversible computation"

2007-2009 :
Post-doctorat
Research Assistant

Université Catholique de Louvain - Electromagnetics MIcrowave Communication Laboratory (EMIC) (Belgium)

Picoseconds laser integration
- Study and writing of a tender for a picoseconds laser micromachine,
- Search for futur applicaions to be integrated in the contexte of the technological plateform WINFAB and the electrical characterization plateform WELCOME,
- Identification of missing electrical characterization needs for futur laser-related applications (i.e. low frequency electrical measurement bench to study very thin layers and very low impédences),
- Search for partnerships and collaboration,


Study of advanced SOI Transistors
- Study of sub-45 nm fully-depleted Transistor with very thin buried oxide (Ultra-Thin Body and BOX: UTBB or UTB2),
- Study of the impact of the space charge conditions in the substrate of UTB2 SOI transistors: ATLAS simulations, developpement of parameter extraction routines, electrical characterization,


Technical and scientific co-teachning and training of a Ph.D Student
- Technical and scientific trainning of M. Mohd Kairuddin Md ARSHAD, Ph.D student at the EMIC Lab, under the supervision of Pr. Jean-Pierre RASKIN, for the electrical characterization, ATLAS modeling, parameters extractions and the study of SOI UTB2 transistors,

Study of polymer membranes in the microwave range for full cells applications
- Study and test of an hyperfrequency range electrical characterization bench with a climate chamber,
- Electrical characterization of Nafion based polymer membranes.



Lien vers UCL Lien vers EMIC








Research Page on
"Comparative Study
of
UTB and UTB2
Transistors"


From 1999 to 2007 S. Burignat was an Assistant Lecturer in the Engineering school CPE-Lyon, France:
1999-2006 Analog and digital electronics (PW) 3rd year of B.S. 110 h/year
2003-2006 General Physics (PW) 2rd year of B.S. 117 h/year
2004-2007 Physics of devices (DW) 3rd year of B.S. 12 h/year
2004-2007 Introduction to electronics and filtering (DW) 3rd year of B.S. 8 h/year

2006-2007 :
Post-doctorat with CNRS

Lyon's Institute of Nanotechnologies (INL-France)

S. Burignat, Design of elementary circuits using emerging nanodevices. CNRS Postdoctoral Report, CNRS UMR 5511 - Ecole Centrale de Lyon (ECL), (2007), Ecully, France, 62 pages.

Link to CNRS Link to ECL Link to INL

2004-2006 :
Post-doctorat at INSA de Lyon

Collaboration LPM-INSA / InESS
Electrical and AFM / EFM Study of capacitive structures with two embedded germanium nanocristal layers.
Link to InESS Link to INSA de Lyon

2000-2004 :
Ph.D at INSA de Lyon

Ph.D Hons. in Integrated Electronics

S. Burignat, Transport mechanisms, ultra-low leakage current and retention in non-volatile floating gate memories, Ph.D Thesis,, INSA de Lyon, Decembre 10th 2004, Villeurbanne - France, French..

Manuscrit de Thèse au format pdf Link to Doc INSA Doc INSA

1999-2000 :
M.Sc. at INSA de Lyon

M.Sc.Hons. - Reasearch - in Integrated Electronics
S. Burignat, Development of the floating gate technique and application to stress induced leakage current (SILCs) measurement in MOS devices, M.Sc. Thesis, National Institute of Applied Sciences of Lyon (INSA), (2000) Villeurbanne - France, French.


Link to INSA de Lyon

1998-1999:
M.Sc. at INSA de Lyon

M.Sc.Hons. - Industial - in Electrical Engineering
S. Burignat, Design of a vertical power MOS transistor, M.Sc. Thesis, National Institute of Applied Sciences of Lyon (INSA), (1999) Villeurbanne - France, French.

Link to INSA de Lyon

1997-1998:
Master of Physics
Université Claude Bernard
Lyon 1

S. Burignat, Study of bovine serum albumin diatoms for the selection of materials for hip replacement, First year Master Thesis, University Claude Bernard Lyon 1 (UCBL), (1998) Villeurbanne - France, French.

Link to University Lyon 1

© Stéphane BURIGNAT